Gates are the logic symbols that interconnect contributory events and conditions in a fault tree diagram. The AND and OR gates described above, as well as a Voting OR gate in which the output event occurs if a certain number of the input events occur (i.e. k-out-of-n redundancy), are the most basic types of gates in classical fault tree analysis. (Note: These gates are explicitly provided for in BlockSim and are described in this section along with their BlockSim implementations. Additional gates are introduced in the following sections.)
In an AND gate, the output event occurs if all input events occur. In system reliability terms, this implies that all components must fail (input) in order for the system to fail (output). When using RBDs, the equivalent is a simple parallel configuration.
Consider a system with two components A and B. The system fails if both A and B fail. Draw the fault tree and reliability block diagram for the system. The next two figures show both the FTD and RBD representations.
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The reliability equation for either configuration is:
In an OR gate, the output event occurs if at least one of the input events occurs. In system reliability terms, this implies that if any component fails (input) then the system will fail (output). When using RBDs, the equivalent is a series configuration.
Consider a system with three components A, B and C. The system fails if either A, B or C fails. Draw the fault tree and reliability block diagram for the system. The next two figures show both the FTD and RBD representations.
The reliability equation for either configuration is:
In a Voting OR gate, the output event occurs if or more of the input events occur. In system reliability terms, this implies that if any k-out-of-n components fail (input) then the system will fail (output).
The equivalent RBD construct is a node and it is similar to a k-out-of-n parallel configuration with a distinct difference, as discussed next. To illustrate this difference, consider a fault tree diagram with a 2-out-of-4 Voting OR gate, as shown in Figure 10.3. In this diagram, the system will fail if any two of the blocks below fail. Equivalently, this can be represented by the RBD shown in Figure 10.4 using a 3-out-of-4 node. In this configuration, the system will not fail if three out of four components are operating, but will fail if more than one fails. In other words, the fault tree looks at k-out-of-n failures for the system failure while the RBD looks at k-out-of-n successes for system success.
Figure 10.3: Illustration of a 2-out-of-4 Voting OR gate.
Figure 10.4: Equivalent representation of the 2-out-of-4 Voting OR gate in Figure 10.3 using a 3-out-of-4 node.
Classical Voting OR gates have no properties and cannot fail or be repaired (i.e. they cannot be an event themselves). In BlockSim, Voting OR gates behave like nodes in an RBD; thus, they can also fail and be repaired just like any other event. By default, when a Voting OR gate is inserted into an FTD within BlockSim, the gate is set so that it cannot fail (classical definition). However, this property can be modified by the user to allow for additional flexibility.
Consider a system with three components A, B and C. The system fails if any two components fail. Draw the fault tree and reliability block diagram for the system. The next two figures show both the FTD and RBD representations.
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The reliability equation for either configuration is:
(1)
Eqn. 1 assumes a classical Voting OR gate (i.e. the voting gate itself cannot fail). If the gate can fail then the equation is modified as follows:
Note that while both the gate and the node are 2-out-of-3, they represent different circumstances. The Voting OR gate in the fault tree indicates that if two components fail then the system will fail; while the node in the reliability block diagram indicates that if at least two components succeed then the system will succeed.
As in reliability block diagrams where different configuration types can be combined in the same diagram, fault tree analysis gates can also be combined to create more complex representations. As an example, consider the fault tree diagram shown in Figure 10.5.
Figure 10.5: A sample FTD using different gates.
Figure 10.6: RBD representation of the FTD shown in Figure 10.5.
A fault tree diagram is always drawn in a top-down manner and with lowest item being a basic event block. Classical fault tree gates have no properties (i.e. they cannot fail).
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